The VITA 57.1 and 57.4 compliant LightABLE™ Optical FMC Boards offers up to 300 Gbps of full-duplex (12-lane 25 Gbps TRX) or 600 Gbps of half-duplex (24-channel 25 Gbps TX or RX) bandwidth data communication and can be used with FPGA front-end processing boards.
Reflex Photonics VITA 57-compliant module boards are based on the latest FPGA’s. The VITA 57.4 version of the LightABLE Optical FMC Board is equipped with two LightABLE optical modules, one handling 12 TX lanes and the other one handling 12 RX lanes allowing short reach applications (up to 100 m) on parallel multimode fiber. In the VITA 57.1 version 10 TX and 10 RX lanes are accessible.
Specifications and features
- VITA 57.1 and VITA 57.4 compatible versions.
- Standard FMC interface.
- Reduced design time.
- Integrated optical transmitter and receivers.
- High-performance computing
- Network switches and routers
- High resolution imaging
- Audio and video broadcast
- Two 12 MT-type optical connectors, one on the LightABLE TX transceiver and one on the LightABLE RX transceiver. An industry standard OM3 optical ribbon with an MT-terminated compatible connector at one end can plug into each receptacle.
- One SSMC connector for external reference clock, AC coupled and 50 Ω-terminated on-board. Can be driven by either a sine wave source (0 to 10 dBm), or a square wave source (LVPECL/CMOS).
- Clock signal provided by FPGA carrier on FMC connector. LVDS 100 Ω differential signal and AC coupled input.
- Local 25 MHz crystal (optional oscillator for special frequency generation when necessary)
- VITA 57.1 HPC connector or VITA 57.4 HSPC connector.
- Power dissipation: 3.5 W including the consumption of the two optical engines.
- FMC I/O voltage: VADJ= 1.8 V or 2.5 V (factory settings).
- 2 MT-interface 12 fibers
Connector (VITA 57.1/57.4)
- 10 (VITA 57.1) or 12 (VITA 57.4) data differential pairs connected to multigigabit transceivers
- Multigigabit transceivers clock output
- Reference clock input
- Clock output
- I2C bus
- Laser control, TX/RX alarm and clock status
A high performance low noise on board clock synthesizer feeds four clocks to the FPGA carrier board:
- Three reference clocks for the FPGA multigigabit transceivers
- One differential LVDS clock signal available as a FPGA global clock (GC)
The reference clock sources can be either:
- On-board 25 MHz ±25 ppm crystal oscillator well suited for most standard applications
- LVDS reference clock provided by FPGA carrier
Six predefined clock settings are available at power-up with different settings of the clock synthesizer.